1. Field of the Invention
The present invention is generally in the field of semiconductors and circuits. More particularly, the invention is in the field of voltage control circuits on semiconductor dies.
2. Background Art
In semiconductor fabrication technology, process parameters can vary significantly from lot to lot, from wafer to wafer in the same lot, and even across the same wafer. For example, process parameters can vary by over 15.0 percent from lot to lot or even from wafer to wafer in the same lot. The process variations can even cause semiconductor dies to operate out of specification, which can significantly affect semiconductor die power, performance, and yield. For example, process variations can affect semiconductor die performance by causing a semiconductor die to have a speed that is either too high or too low. As another example, process variations can also reduce semiconductor die yield, since semiconductor dice that are out of specification may have to be discarded. Thus, semiconductor die manufacturers are challenged to provide a solution to process variations.
One approach currently utilized for dealing with process variations across the wafer consists of “speed binning” semiconductor dies. In “speed binning,” the semiconductor dies are tested and sorted based on their operating speed at a specified fixed voltage. This approach works well for mass produced semiconductor dies, such as computer microprocessors, where a market exist for different speed devices. However, this approach does not work as well for many other semiconductor market segments, such as networking semiconductor dice, where volume isn't as high and only a single speed device can be sold.
In another approach, the operating voltage of the semiconductor die is adjusted in an attempt to compensate for process variations. For example, process variations may be overcome by running a slower device at an increased voltage and running a faster device at a decreased voltage. However, this approach is too cumbersome, and thus ineffective, since the supply voltage provided to each semiconductor die would have to be individually adjusted. Additionally, this approach undesirably hinders semiconductor die interchangeability in different hardware platforms.
Thus, there is a need in the art for a semiconductor die that is effectively compensated for process variations such that each semiconductor die meets customer required specifications.